IEICE Society Conference 2026
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Session Details

一般セッションA. Engineering Sciences Society : A-1．Circuits and Systems

[A-1]Circuits and Systems

Fri. Sep 25, 2026 9:30 AM - 11:45 AM JST
Fri. Sep 25, 2026 12:30 AM - 2:45 AM UTC
Materials Science Building MC208(Hokkaido University)
Chair:YOHEI NAKAMURA, Nomoto Shinji
9:30 AM - 9:45 AM JST(12:30 AM - 12:45 AM UTC)Candidate for Academic Incentive Award

[A-1-01]Derivation of Transfer Function for a Notch-Consolidated 5th-Order Elliptic Chebyshev Filter

◎Kanata Yoshida1, Fujihiko Matsumoto1 (1. National Defense Academy)
9:45 AM - 10:00 AM JST(12:45 AM - 1:00 AM UTC)Candidate for Academic Incentive AwardCareer Explorer

[A-1-02]光パケット送信器の伝送距離適応制御による低消費電力化の検討

◎△Reo Kondo1, Yusuke Kusaka1, Yo Miura1, Makoto Nakakmura2, Daisuke Ito2 (1. Graduate School of Gifu University, 2. Gifu University)
10:00 AM - 10:15 AM JST(1:00 AM - 1:15 AM UTC)Candidate for Academic Incentive AwardCareer Explorer

[A-1-03]Low-Power Optical Packet Receiver Circuit with Adaptive Transmission Loss Control

◎△Yo Miura1, Yusuke Kusaka1, Reo Kondo1, Makoto Nakamura2, Daisuke Ito2 (1. Graduate School of Gifu University, 2. Gifu University)
10:15 AM - 10:30 AM JST(1:15 AM - 1:30 AM UTC)Candidate for Academic Incentive Award

[A-1-04]Linear operating range enhancement of a CMOS optical modulator driver circuit with two stacked stages

◎Tsubasa Yabutani1, Hinata Tajima1, Yusuke Kusaka1, Daisuke Ito2, Makoto Nakamura2 (1. Graduate School of Natural Science and Technology, Gifu University, 2. Faculty of Engineering, Gifu University)
10:30 AM - 10:45 AM JST(1:30 AM - 1:45 AM UTC)

Break time

10:45 AM - 11:00 AM JST(1:45 AM - 2:00 AM UTC)Candidate for Academic Incentive AwardCareer Explorer

[A-1-05]Proposal for an Analog-to-Time Converter Using a PLL

◎△Yoshiki Koshiyama1, Hiroki Nishihara1, Akira Yasuda1 (1. Hosei Univ.)
11:00 AM - 11:15 AM JST(2:00 AM - 2:15 AM UTC)

[A-1-06]A BJT-Based Trimless Temperature Sensor in 65nm CMOS

〇Nabil Soliman1, Yuncheng Zhang1, Hiroyuki Sakai1, Kazuaki Kunihiro1, Kenichi Okada1 (1. Institute of Science Tokyo)
11:15 AM - 11:30 AM JST(2:15 AM - 2:30 AM UTC)

[A-1-07]Increasing the Speed and Accuracy of Down-Conductor Disconnection Detection Systems

〇Kazuki Obayashi1, Syunichi Yanagawa1, Isao Imai2, Masafumi Owa2 (1. SHODEN CORPORATION, 2. iSA Electronic Systems)
11:30 AM - 11:45 AM JST(2:30 AM - 2:45 AM UTC)

[A-1-08]Improvement of Convergence Speed in CTLE Design Optimization Using FMQA with Engineering

〇Shota Koshikawa1, Kaito Hagiwara1, Tsuyoshi Yoshida1 (1. Mitsubishi Electric Corporation)
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