Presentation Information
[C-12-26]A Low-Power CMOS Injection-Locked Frequency Divider Using Tail-Inductor-BasedWaveform Shaping
△Aaron Arai1, Kyoya Takano1 (1. Tokyo University of Science)
Keywords:
RF Circuits,Injection-Locked Frequency Divider,CMOS,FR3
In recent years, the FR3 frequency band has been investigated as a candidate for 6G wireless communications due to its wide bandwidth and long-range propagation characteristics. Phase-Locked Loops (PLLs) are widely used for carrier signal generation in wireless communications, and the realization of PLLs along with their constituent frequency dividers operating in the FR3 band is strongly demanded. Injection-Locked Frequency Dividers (ILFDs), which are capable of high-frequency operation, face challenges in terms of locking range extension and power consumption reduction. In this paper, we propose a circuit that secures a wide locking range by setting the Q-factor of the resonator low, while reducing power consumption through waveform shaping utilizing a tail inductor. Simulation results using a 0.18 μm CMOS process demonstrate a locking range of 7–14.5 GHz (fractional bandwidth of 69.8% at 0 dBm input power) and a core power reduction of 2.5 mW.