講演情報
[19p-A35-9]Highly Reliable Self-Aligned Top-Gate Thin-Film Transistors with Hydrogen-Doped Poly-InOx (InOx:H) channel
〇(DC)Mir Mutakabbir Alom1, Motoki Ando1, Mamoru Furuta1 (1.Kochi Univ. of Tech.)
キーワード：
Oxide Semiconductor、Thin Film Transistor、Reliability
Oxide semiconductors based thin film transistors (TFTs) have received immense interest due to their high mobility (µFE), large area uniformity, and low leakage current. Bottom-gate oxide TFTs exhibit large parasitic capacitances in the gate and source/drain (S/D) regions. The top gate self-aligned (TG-SA) TFT structure is prominent to reduce the parasitic capacitance. This presentation focuses on the reliability of TG-SA poly-InOx:H TFT.
The 30-nm InOx:H films were deposited by RF magnetron sputtering and annealed at 300°C for crystallization, as show in Fig.1 of fabrication steps. Next, a 140-nm SiO2 layer was deposited at 300°C as gate insulator (GI) by inductively coupled plasma chemical vapor deposition (ICP-CVD). Then, a 150 nm thick Al–Nd–Ti alloy was deposited as a gate electrode. B+ ions were implanted through the GI to form S/D regions. Subsequently, a SiNx/SiO2 stacked film was deposited for an inter-layer dielectric by ICP-CVD. The S/D electrodes were formed by Mo/Al/Mo. Figure 2 shows the transfer characteristics of the TG-SA poly-InOx:H TFT. The as-fabricated TFT shows the depletion-mode characteristics. After applying the post fabrication annealing at 200°C, the TFT operated in an enhancement-mode with values of Vth and µFE are 0.23 V and 29.18 cm2/Vs, respectively. Figure 3 shows the changes in transfer characteristics under NBTS with a gate voltage of -15 V and grounded source and drain electrodes at a stress temperature of 60°C for 6,000 s. Poly-InOx:H TFT exhibited excellent stability under NBTS with no change of the Vth. The reliability of TG-SA Poly-InOx:H TFTs will also be discussed.
The 30-nm InOx:H films were deposited by RF magnetron sputtering and annealed at 300°C for crystallization, as show in Fig.1 of fabrication steps. Next, a 140-nm SiO2 layer was deposited at 300°C as gate insulator (GI) by inductively coupled plasma chemical vapor deposition (ICP-CVD). Then, a 150 nm thick Al–Nd–Ti alloy was deposited as a gate electrode. B+ ions were implanted through the GI to form S/D regions. Subsequently, a SiNx/SiO2 stacked film was deposited for an inter-layer dielectric by ICP-CVD. The S/D electrodes were formed by Mo/Al/Mo. Figure 2 shows the transfer characteristics of the TG-SA poly-InOx:H TFT. The as-fabricated TFT shows the depletion-mode characteristics. After applying the post fabrication annealing at 200°C, the TFT operated in an enhancement-mode with values of Vth and µFE are 0.23 V and 29.18 cm2/Vs, respectively. Figure 3 shows the changes in transfer characteristics under NBTS with a gate voltage of -15 V and grounded source and drain electrodes at a stress temperature of 60°C for 6,000 s. Poly-InOx:H TFT exhibited excellent stability under NBTS with no change of the Vth. The reliability of TG-SA Poly-InOx:H TFTs will also be discussed.
コメント
コメントの閲覧・投稿にはログインが必要です。ログイン