講演情報
[9a-A21-6]Formation of Reduced-Dit 4H-SiC MOS Stacks with an Ultrathin Interfacial Layer Thermally Grown by a Low-Temperature and Low-PO2 Oxidation
〇(D)Hejian Zhou1, Shunjie Yu1, Atsushi Tamura1, Koji Kita1 (1.Dept. of Adv. Mater. Sci., The Univ. of Tokyo)
キーワード：
SiC、Interfacial Layer
NO annealing is widely used to reduce the interface state density (Dit) in SiO2/4H-SiC MOS structures, but its effect is limited by nitrogen saturation. In this study, an ultrathin thermally grown SiO2 interfacial layer was formed under low-temperature and low oxygen partial pressure (PO2) conditions, followed by ALD of Al2O3. C-V and conductance measurements showed that the sample oxidized in diluted O2 exhibited reduced frequency dispersion and lower than that oxidized in 100% O2. After diluted-O2 post-oxidation annealing, the Dit of the dOx-dO sample reached at ~3.3x1011 eV-1 cm-2 at E=EC-0.2 eV, which was lower than that of a conventional NO-annealed sample. These results indicate that a low-temperature, low-PO2-oxidized ultrathin interfacial layer is effective for improving the initial SiC MOS interface.