[5] Session 5 (D8. Silicon LSI Emerging Technologies)

11:15 AM - 11:45 AM JST(2:15 AM - 2:45 AM UTC)

[5-02] [Invited] Interface dipole engineering for multi-Vt technology of gate-all-around nanosheet/CFET devices

*Hiroaki Arimura¹, Leo Lukose¹, Jishnu Ganguly¹, Hans Mertens¹, Jacopo Franco¹, Naoto Horiguchi¹ (1. imec (Belgium))

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