[5] Session 5 (D8. Silicon LSI Emerging Technologies)

12:15 PM - 12:30 PM JST(3:15 AM - 3:30 AM UTC)

[5-04] Reduction of back bias effect in cryogenic SOI-MOSFET

*Ryosuke Kobayashi¹, Takayuki Mori¹, Takahiro Mori², Hiroshi Oka², Jiro Ida¹ (1. Kanazawa Inst. of Tech. (Japan), 2. AIST (Japan))

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