[AI-4] Invited Talks Related to Hardware Security | General Conference of the Institute of Electronics, Information and Communication Engineers

Session Details

依頼シンポジウムセッションI. Symposium Session : AI-4．Invited Talks Related to Hardware Security

[AI-4]Invited Talks Related to Hardware Security

Fri. Mar 13, 2026 1:45 PM - 5:00 PM JST
Fri. Mar 13, 2026 4:45 AM - 8:00 AM UTC

Building 1 2F N203(Kyushu Sangyo University)

Chair:Toru Akishita(Sony Semiconductor Solutions Corporation), Hiwatari Harunaga(Sony Semiconductor Solutions Corporation)

Invited talks by authors presenting at international conferences related to hardware security including CHES, HOST, FDTC, USENIX security, etc.

1:45 PM - 2:15 PM JST(4:45 AM - 5:15 AM UTC)

[AI-4-01](from HOST 2025) ML-EMFI: A Machine Learning-Driven Pre-Silicon Electromagnetic Fault Injection Security Evaluation for Robust IC Design

Pantha Protim Sarker², Tianze Kan³, Jingchen Liang³, Ozgur Tuncer³, Bo He³, Zelin Lu³, Sudarshan Mallu³, Lang Lin³, Norman Chang³, 〇Rikuu Hasegawa¹, Kazuki Monta¹, Makoto Nagata¹, Farimah Farahmandi², Mark Tehranipoor² (1. Kobe University, 2. University of Florida, 3. Ansys, Inc.)

2:15 PM - 2:45 PM JST(5:15 AM - 5:45 AM UTC)

[AI-4-02](from FDTC 2025) Improving fault vulnerability detection via rehosting and comparative analysis of open-source tools

〇Shoei Nashimoto¹ (1. Mitsubishi Electric)

2:45 PM - 3:15 PM JST(5:45 AM - 6:15 AM UTC)

[AI-4-03](from HOST 2025) Amplifying Electromagnetic Leakage by Hardware Trojans Through Cable Geometry Manipulation

〇Hayato Ide¹, Shohei Matsumoto¹, Taiki Kitazawa¹, Shugo Kaji ¹, Daisuke Fujimoto¹, Takashi Kasuga², Yuichi Hayashi ¹ (1. Nara Institute of Science and Technology, 2. National Institute of Technology, Nagano College)

3:15 PM - 3:30 PM JST(6:15 AM - 6:30 AM UTC)

Break time

3:30 PM - 4:00 PM JST(6:30 AM - 7:00 AM UTC)

[AI-4-04](from CHES 2025) Perceived Information Revisited II: Information-Theoretical Analysis of Deep-Learning Based Side-Channel Attacks

〇Akira Ito¹, Rei Ueno², Naofumi Homma¹ (1. Tohoku University, 2. Kyoto University)

4:00 PM - 4:30 PM JST(7:00 AM - 7:30 AM UTC)

[AI-4-05](from CHES 2025) All You Need is XOR-Convolution: A Generalized Higher-Order Side-Channel Attack with Application to XEX/XE-based Encryption

〇Rei Ueno¹ (1. Kyoto University)

4:30 PM - 5:00 PM JST(7:30 AM - 8:00 AM UTC)

[AI-4-06](from VLSI Symposium 2025) A High-Order Masking with Load-Delay-Equalized WDDL for Provable Side-Channel Security

〇Noriyuki Miura¹, Kazuki Monta², Takuya Wadatsumi², Jun Shiomi¹, Yukihito Hiraga³, Takeshi Sugawara³, Makoto Nagata² (1. The University of Osaka, 2. Kobe University, 3. The University of Electro-Communications)

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