Presentation Information
[23p-A307-3]Empowering Efficiency: Scaling Device Area for Ultra-low-power Dissipation in Protonic Synapses
〇SatyaPrakash Pati1, Satoshi Hamasuna1, Takeaki Yajima1 (1.Kyushu Univ.)
Keywords:
Protonic Synaptic Devices,Electrical Control,Tungsten Oxide
The pursuit of energy-efficient computing systems has become increasingly important in various fields, including artificial intelligence and neuromorphic computing. Protonic artificial synapses have garnered significant attention as a potential solution for achieving ultra-low-power dissipation. However, optimizing the power efficiency of these synapses remains a key challenge. In this study, we focus on the concept of scaling the device area as a means to empower efficiency in 2-terminal protonic artificial synapses. By exploring the relationship between device area and power dissipation, we aim to unlock new possibilities for energy-efficient computing architectures. We demonstrate analogous resistance change in a high impedance range through homogeneous proton migration, instead of the conventional filamentary method. Power dissipation can be as low as 10fW for a 50nm diameter device. Our research builds upon prior studies that have investigated the use of protonic artificial synapses in neuromorphic systems