[16p-A41-1~9] (Open Symposium) The Frontline of Materials, Processes, and Packaging Technologies Collaborating with State-of-the-Art Logic Semiconductors

3:55 PM - 4:25 PM JST(6:55 AM - 7:25 AM UTC)

[16p-A41-6] Plasma Etching technologies for leading-edge Logic LSI

〇Masaru Izawa¹ (1.Hitachi High-Tech)

Keywords:

semiconductor,Plasma process,Etching

In leading-edge Logic LSI, finFET and Design Technology Co-Optimization (DTCO) have been adopted. GAA FETs is developing for production, and CFET is investigated. These new structures require not only conventional directional etching but also precise lateral etching to form complex structures. This paper shows the challenges and a portion of solutions in etching process, such as Si/SiGe stack etching, the nanometer level etching in the Work Function Metal (WFM) process, and conformal lateral etching in the nanometer level space.