The 85th JSAP Autumn Meeting 2024
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Symposium (Oral)Symposium : 【Open Symposium】The Frontline of Materials, Processes, and Packaging Technologies Collaborating with State-of-the-Art Logic Semiconductors

[16p-A41-1~9](Open Symposium) The Frontline of Materials, Processes, and Packaging Technologies Collaborating with State-of-the-Art Logic Semiconductors

Mon. Sep 16, 2024 1:30 PM - 5:30 PM JST
Mon. Sep 16, 2024 4:30 AM - 8:30 AM UTC
A41 (TOKI MESSE 4F)
Keizo Kinoshita(AIO Core), Fumihiro Inoue(YNU)
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1:30 PM - 1:35 PM JST(4:30 AM - 4:35 AM UTC)

[16p-A41-1]Opening

〇Jiro Ida1,2 (1.Kanazawa Institute of Technology, 2.Chair, Silicon Technology Division)
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1:35 PM - 2:05 PM JST(4:35 AM - 5:05 AM UTC)

[16p-A41-2]Strategies of AI, computing, and semiconductor

〇Hisashi Kanazashi1 (1.Ministry of Economy, Trade and Industry (METI))
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2:05 PM - 2:35 PM JST(5:05 AM - 5:35 AM UTC)

[16p-A41-3]Technology Trends of Advanced Logic Devices: Past, Present, and Future

〇Toshiro Hiramoto1 (1.IIS, UTokyo)
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2:35 PM - 3:05 PM JST(5:35 AM - 6:05 AM UTC)

[16p-A41-4]A New Beginning for Back-End Processes: The Future of Innovative Chiplet Technology

〇Yasumitsu Orii1 (1.Rapidus Corporation)
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3:25 PM - 3:55 PM JST(6:25 AM - 6:55 AM UTC)

[16p-A41-5]Wafer technology supporting Leading-edge Logic Devices

〇Kazuhito Matsukawa1 (1.SUMCO)
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3:55 PM - 4:25 PM JST(6:55 AM - 7:25 AM UTC)

[16p-A41-6]Plasma Etching technologies for leading-edge Logic LSI

〇Masaru Izawa1 (1.Hitachi High-Tech)
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4:25 PM - 4:55 PM JST(7:25 AM - 7:55 AM UTC)

[16p-A41-7]Development of Package Substrate with Organic Interposer linked to Advanced Logic Device

〇Shota Miki1 (1.SHINKO ELECTRIC INDUSTRIES CO., LTD.)
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4:55 PM - 5:25 PM JST(7:55 AM - 8:25 AM UTC)

[16p-A41-8]Automotive Chiplet Technologies Cooperating with Advanced AI

〇Takao Iwaki1 (1.MIRISE)
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5:25 PM - 5:30 PM JST(8:25 AM - 8:30 AM UTC)

[16p-A41-9]Closing

〇Katsura Miyashita1,2, Osamu Nakatsuka3,2 (1.Toshiba Electronic Devices & Storage Corporation, 2.Vice Chair, Silicon Technology Division, 3.Nagoya University)
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