[17a-B1-1~7] 13.4 Si processing /Si based thin film / MEMS / Equipment technology

10:45 AM - 11:00 AM JST(1:45 AM - 2:00 AM UTC)

[17a-B1-7] Development of smart CMP process control technology for 3D-structured FETs

〇Yuji Kasashima¹, Takashi Matsukawa¹, Kazuya Uejima¹, Masashi Yamagishi¹, Yoshihiro Hayashi¹ (1.AIST SFRC)

Keywords:

CMP,OCD,EPD