[22p-11F-1~15] 3.14 Silicon photonics and integrated photonics (formerly 3.15)

3:45 PM - 4:00 PM JST(6:45 AM - 7:00 AM UTC)

[22p-11F-9] Monolithic integration of various types of InP-based epitaxial structures on Si-photonic circuit using III-V chip-on-SOI wafer bonding

〇Takehiko Kikuchi^1,2,3, Munetaka Kurokawa^1,2, Naoki Fujiwara^1,2,3, Naoko Inoue^1,2,3, Takuya Mitarai^1,2,3, Hidenari Fujikata^1,2, Takuo Hiratani^1,2, Toshiyuki Nitta^1,2,3, Yuhki Itoh^1,2, Tohma Watanabe^1,2, Chang-Yong Lee^1,2, Akira Furuya^1,2, Tsuyoshi Horikawa³, Nobuhiko Nishiyama^1,3, Hideki Yagi^1,2,3 (1.PETRA, 2.TDL, Sumitomo Electric., 3.Tokyo Tech.)

Keywords:

III-V/Si hybrid integration,chip-on-wafer bonding,hydrophilic bonding

The III-V/Si hybrid integration technologies is very attractive for the realization of a next-generation photonic integrated circuit with high-speed operation and low-power dissipation, and we have reported hybrid lasers by direct bonding of InP chips with the size of 4 mm² on SOI wafer. In this work, towards the multifunctional integration of active devices, we present the monolithic integration of various types of epitaxial structures on Si-photonic circuit, by a reduction for the size of InP chips to less than 1 mm².