[10p-S1-1~20] 13.5 Semiconductor devices/ Interconnect/ Integration technologies

2:15 PM - 2:30 PM JST(5:15 AM - 5:30 AM UTC)

[10p-S1-3] Embedded flash memory with suppressed endurance characteristic degradation

〇HIROSHIGE HIRANO¹, HIROAKI KURIYAMA¹, ATSUSHI NOMA¹ (1.Tower Partners Semiconductor Co., Ltd)

Keywords:

flash memory,endurance degradation

To reduce process costs, there is a growing demand for non-volatile memory with high endurance cycles by using only standard logic transistors. As the endurance cycle increases, the rewrite time deteriorates. This report explains the mechanism of this characteristic degradation and how to suppress it by optimizing endurance conditions and improving the memory cell structure.