[10p-S1-1~20] 13.5 Semiconductor devices/ Interconnect/ Integration technologies

3:00 PM - 3:15 PM JST(6:00 AM - 6:15 AM UTC)

[10p-S1-6] Improvements of GAAFET fabrication processes selected for In-line monitoring technology

〇Shin Kono¹, Atsushi Yagishita¹, Chia-Tsong Chen¹, Kazuya Uejima¹, Takahiro Goya¹, Toshifumi Irisawa¹, Takashi Matsukawa¹, Yoshihiro Hayashi¹ (1.National Institute of Advanced Industrial Science and Technology)

Keywords:

Gate All Around Field Effect Transistor,Optical Critical Dimension

GAAFET製造工程内における、「垂直入射型OCD測定」を用いたプロセス改善事例を報告致します。