[11a-PB1-1~31] 13.7 Compound and power devices, process technology and characterization

[11a-PB1-28] Impact of Conditioning Time on Vth Measurement in Gate Oxide Degradation Test of SiC MOSFET

〇Kota Kusano¹, Hajime Takayama¹, Kazutoshi Kobayashi¹, Michihiro Shintani¹ (1.Kyoto Inst. of Tech.)

Keywords:

SiC MOSFET,Gate-switching instability,Reliability

In this presentation, the effect of conditioning time on gate oxide degradation evaluation in SiC MOSFETs is reported. Focusing on gate switching instability (GSI), the conditioning pulse duration and stress conditions were varied, and the time evolution of the threshold voltage (Vth) after stress removal was investigated. The results show that the post-stress Vth behavior associated with GSI does not exhibit the recovery characteristics commonly reported for bias temperature instability (BTI). In addition, the measured Vth variation was found to depend on the conditioning conditions.