[11p-B21-1~9] Atomic Layer Process (ALP) analysis and application technologies (4)

1:00 PM - 1:30 PM JST(4:00 AM - 4:30 AM UTC)

[11p-B21-1] Expectations for Atomic Layer Process Technology from the Viewpoint of a Semiconductor Device Manufacturer

〇Noriyuki Asami¹, Yukihisa Nakao¹, Yukihisa Wada¹, Mitsunari Sukekawa¹, Yuichiro Sasaki¹, Shintaro Arai¹ (1.Rapidus Corporation)

Keywords:

ALD,GAA,ALE

As semiconductor devices continue to scale and adopt three-dimensional architectures, advanced structures such as Gate-All-Around (GAA) and future Complementary FET (CFET) devices require atomic-scale control of feature dimensions and material properties. In this presentation, key process challenges for advanced logic devices will be discussed from a device manufacturer’s perspective. The potential of Atomic Layer Process (ALP) technologies, including Atomic Layer Deposition (ALD) and Atomic Layer Etching (ALE), will be highlighted as promising solutions for future technology nodes. Current challenges and future directions of ALP technology will also be presented.