[8a-A21-1~10] 13.7 Compound and power devices, process technology and characterization

11:30 AM - 11:45 AM JST(2:30 AM - 2:45 AM UTC)Presentation by Applicant for JSAP Young Scientists Presentation Award

[8a-A21-10] Impact of Device Isolation Method on Off-State Leakage Current in GaN PSJ-FETs

〇Seiji Ishimoto¹, Atsushi Tanaka¹, Eito Kokubo², Yoshio Honda^1,3,4, Hiroshi Amano^1,3,4 (1.Nagoya Univ. IMaSS, 2.Nagoya Univ., 3.Nagoya Univ. D center, 4.Nagoya Univ. IAR)

Keywords:

GaN,PSJ

GaN polarization superjunction (PSJ) transistors are promising high-voltage lateral GaN power devices based on a GaN/AlGaN/GaN heterostructure. In the off-state, the two-dimensional electron gas and two-dimensional hole gas are depleted, and the remaining positive and negative polarization charges form a charge-balanced region that relaxes electric-field crowding. In practical devices, residual conductive paths in the isolation region can increase off-state leakage current. In this study, GaN PSJ-FETs with mesa etching isolation and B ion implantation isolation were fabricated, and their leakage currents were compared under off-state bias. At V_GS = −15 V and V_DS = 1500 V, B ion implantation isolation reduced the gate leakage current I_G to around 10⁻⁴ mA/mm, while some mesa-isolated devices showed I_G of 10⁻³–10⁻² mA/mm. By contrast, the non-gate leakage component I_D−I_G was below 10⁻³ mA/mm for some mesa-isolated devices, but exceeded 10⁻³ mA/mm for ion-implanted devices. These results indicate that each isolation method suppresses different leakage components.