[9a-A21-1~11] 13.7 Compound and power devices, process technology and characterization

11:00 AM - 11:15 AM JST(2:00 AM - 2:15 AM UTC)Presentation by Applicant for JSAP Young Scientists Presentation Award

[9a-A21-8] Negative Threshold Voltage Shift and Its Channel-Length dependence in n-Chennel SiC MOSFETs under AC Gate Stress

〇(M2)Aoi Koyasu¹, Noriyuki Iwamuro¹, Hiroshi Yano¹ (1.Univ. of Tsukuba)

Keywords:

SiC MOSFET,Threshold Voltage Shift,SiC/SiO2 Interface

Traditionally, gate DC stress tests have been widely used to evaluate the threshold voltage reliability of MOSFETs. However, as a phenomenon specific to SiC MOSFETs, it has been reported that repeated switching of the gate voltage between inversion and accumulation induces a large threshold voltage shift (ΔV_th). In recent years, therefore, threshold voltage instability under gate AC stress, known as gate switching instability (GSI), has attracted increasing attention. Most previous studies on GSI in n-channel SiC MOSFETs have reported positive ΔV_th shifts. In this study, we report that negative ΔV_th shifts can occur depending on the channel length and nitridation conditions.