Session Details

[C-12]Integrated Circuit and Devices

Fri. Mar 13, 2026 1:45 PM - 5:00 PM JST
Fri. Mar 13, 2026 4:45 AM - 8:00 AM UTC
Building 1 2F S206(Kyushu Sangyo University)
Chair:Yosuke Nakamura, Mitsuhiko Igarashi(Renesas Electronics Corporation)

[C-12-47]A 24–49 GHz CMOS Area-Efficient Phase-Invariant Mixed-Type Attenuator with Capacitive Compensation for 5G New Radio

◎△MINZHE TANG1, Zheng Li1, Jian Pang1, Peng Luo1, Qiaoyu Wang1, Atsushi Shirane1, Kenichi Okada1 (1. Institute of Science Tokyo, Okada Lab)

[C-12-48]A Ka-Band Time-Modulated Variable Gain Amplifier with 30-dB Gain Tuning and <0.1-Degree Phase Variation via Duty Cycle Control

◎Dongfan Xu1, Minzhe Tang1, Yi Zhang1, Zheng Li1, Kazuaki Kunihiro1, Kenichi Okada1 (1. Institute of Science Tokyo)

[C-12-49]Research on Variable Gain Amplifiers with Low Phase Variation for D2D Satellite Communications

◎△Yuya Takahashi1, Shunya Watanabe1, Keito Yuasa1, Atsushi Shirane1 (1. Science Tokyo)

[C-12-50]Research on High Resolution Vector-Sum Phase Shifter for D2D Satellite Communications

〇Shunya Watanabe1, Yuya Takahashi1, Keito Yuasa1, Atsushi Shirane1 (1. Institute of Science Tokyo)

Break time

[C-12-51]Design of Rad-Hard LNAs for Radiation-Tolerant Wireless Communication System

◎△Yasuto Narukiyo1, Kotaro Ynaka1, Hans Heldian1, Keito Yuasa1, Sena Kato1, Takeshi Ota1, Jill Mayeda1, Atushi Shirane1 (1. Institute of Science Tokyo)

[C-12-52]Study on Radiation-Tolerant CMOS Power Amplifiers for Wi-Fi Communication in Nuclear Reactors

◎△Kotaro Yanaka1, Yasuto Narukiyo1, Hans Herdian1, Keito Yuasa1, Sena Kato1, Takeshi Ota1, Jill Mayeda1, Atsushi Shirane1 (1. Institute of Science Tokyo)

[C-12-53]An Oscillator Design in 65 nm CMOS

〇Daxu Zhang1, Yuncheng Zhang1, Kenichi Okada1 (1. Institute of Science Tokyo)

[C-12-54]A Feedback-Regulated Power Detector Enabling Temperature-Insensitive for mm-wave Systems

◎△Ziyuan Ren1, Zheng Li1, Kenichi Okada1 (1. Institute of Science Tokyo)

Break time

[C-12-55]Proposal of HCI measurement circuit for ring oscillator with variable bias

◎Nagi Nozaki1, Yuki Koyama1, Kazutoshi Kobayashi1, Jun Furuta2, Ryo Kishida3, Nobukazu Takai1, Mithuhiko Igarashi4, Shigetaka Kumashiro4, Michitarou Yabuuchi4, Hironori Sakamoto4 (1. Kyoto Institute of Technology, 2. Okayama Prefectural Univ, 3. Toyama Prefectural Univ, 4. Renesas Electronics)

[C-12-56]Design of Dynamic Soft Error Measurement Circuit in a 22 nm Bulk Process

◎Yusaku Nakaoka1, Shuhei Mandai1, Arata Matsumoto1, Ryuichi Nakajima1, Jun Furuta2, Kazutoshi Kobayashi1 (1. Kyoto Institute of Technology, 2. Okayama Prefectural University)

[C-12-57]フリップチップ裏面電圧印加による集積回路特性変動の評価

◎△Shuhei Yokota1, Rikuu Hasegawa1, Takuya Wadatsumi1, Kazuki Monta1, Junichi Sakamoto2, Shinichi Kawamura2, Makoto Nagata1,2 (1. Kobe University, 2. Inst. of Advanced Industrial Science and Technology)