Session Details

[P2-4]Device-related technologies, Passive components and materials 2

Wed. Jun 3, 2026 12:40 PM - 2:00 PM JST
Wed. Jun 3, 2026 3:40 AM - 5:00 AM UTC
Poster4(Event & Exhibition Hall)
Chair:Yasuo Higuchi(Rohm Co., Ltd.)

[P2-4-01]Investigation of AC Resistance in Carbon Nanotube Ribbon Conductors for Planar Magnetics

*Tianming Luo1, Bima Nugraha Sanusi1, Ziwei Ouyang1 (1. Technical University of Denmark (Denmark))

[P2-4-02]A Comparison of Transformer Copper Loss for Different Winding Configurations in a 200-kW, 16-kHz Dual Active Bridge Converter

*Ryohta Shimamoto1, Qichen Wang1, Toshihisa Tajyuta1, Koji Maruyama1 (1. Fuji Electric Co. Ltd. (Japan))

[P2-4-03]Design and Comparative Evaluation of Three-Phase Coupled Inductors

*Yunni Li1, Thomas Gradinger1 (1. Hitachi Energy Research (Switzerland))

[P2-4-04]Bayesian Inference-based Multi-Fidelity Surrogate Modeling for Circuit-Level Inductor-Optimization

*Nobuto Misono1, Yuki Sato1, Hirokazu Matsumoto1 (1. Aoyama Gakuin University (Japan))

[P2-4-05]Utilization of Multi-Winding Transformers with Single Active Bridge Converter for Power Quality Enhancement in Multiple-Output Power Supply

*Satit Owatchaiphong1, Kitsada Poonsawad1, Wiranya Mungtorbua1, Athiphat Kanavittaya1, Narong Thumputi1 (1. King Mongkut's University of Technology North Bangkok (Thailand))

[P2-4-06]Minimal Implementation Method of Active Gate Driver for Improving Performance of DC-DC Converters

*Shuhei Fukunaga1, Hajime Takayama2, Takashi Hikihara3 (1. The University of Osaka (Japan), 2. Kyoto Institute of Technology (Japan), 3. Kyoto University (Japan))

[P2-4-07]A Fractional-Turn Transformer for Hybrid Switched Capacitor Converters

*Tongrui Sun1, Xu Yang1, Panming Li1, Wei Zhou1, Xingwei Huang1, Keliang Chen1, Wenjie Chen1 (1. School of Electrical Engineering, Xi 'an Jiaotong University (China))

[P2-4-08]Small-Signal Measurements for Fringing Effects of Air Gaps on Winding Losses in Magnetic Components

Shaokang Luan1, *Henrik Hansen1, Hongbo Zhao1 (1. Aalborg University (Denmark))

[P2-4-09]Flip Chip SiC Power Module for Common-Mode Noise Reduction with an Integrated Shunt Resistor

*Thiyu Sansika Warnakulasooriya1, Sihoon Choi2, Yu Yonezawa2, Jun Imaoka2, Masayoshi Yamamoto2 (1. Department of Electrical Engineering, Nagoya University (Japan), 2. Institute of Materials and Systems for Sustainability, Nagoya University (Japan))

[P2-4-10]A Modular Test Bench for Real-Time Characterization of DC-Link Capacitors under Pulsed Load Conditions

*Mario Wasner1, Martin Hübner1, Peer Orzelek1, Ulrich Unterhinninghofen1, Marek Galek1 (1. Munich University of Applied Sciences (Germany))

[P2-4-11]MOSFET Package with Integrated Si-Capacitor-Based RC Snubber for Reduced Switching Surge and Loss

*Takenori Yasuzumi1, Susumu Obata1, Kazuhito Higuchi1, Tatsuya Ohguro2 (1. Toshiba Corp. (Japan), 2. Toshiba Electric Devices & Storage Corp. (Japan))

[P2-4-13]Flexible Multi-Layer Foil Based Self-Resonant Transformer for High-Density LLC Converter

*Sajib Ahmed1, Dylan Lu1, Saad Mekhilef2, Yam Siwakoti1 (1. School of Electrical and Data Engineering, Faculty of Engineering and IT, University of Technology Sydney (Australia), 2. School of Engineering, Swinburne University of Technology (Australia))

[P2-4-14]Magnetic Core Selection in High-Frequency DAB and LLC Transformer Design Considering Both Core Loss and Saturation Flux Density Constraints

*Ryohei Okada2, Keiji Wada1 (1. Tokyo Metropolitan University (Japan), 2. Takushoku University (Japan))

[P2-4-15]Parallel Operation of GaN-based Monolithic Bidirectional Switches for Energy Storage Systems

Shuwei He1, Yuzhou Yao1, Zhining Zhang1, *Jin Wang1, Jacob Mueller2, Luciano A. Garcia Rodriguez2, Stanley Atcitty2 (1. The Ohio State University (USA), 2. Sandia National Laboratories (USA))

[P2-4-16]Empirical and Analytical Modelling of Capacitance
Induced Dissipation Losses in Power Semiconductors

*Kaushik Mirdoddi1,3, Roberto Petrella2,3 (1. System-Level Integration Technologies, Power Electronics Division, Silicon Austria Labs GmbH, Villach, Austria (Austria), 2. Power Electronics Division, Silicon Austria Labs GmbH, Villach, Austria (Austria), 3. PEMD Laboratory, Polytechnic Department of Engineering and Architecture, University of Udine, Udine, Italy (Italy))

[P2-4-17]Development of a Current Overshoot Detection Circuit for Power Semiconductor Switches

Satoshi Sugahara2, *Takashi Toriyabe1, Takato Sugawara1 (1. Fuji Electric Co., Ltd. (Japan), 2. Fukuyama University (Japan))