[20p-B201-1~9] 13.4 Si processing /Si based thin film / MEMS / Equipment technology

3:15 PM - 3:30 PM JST(6:15 AM - 6:30 AM UTC)

[20p-B201-7] Threshold Voltage Control of MONOS-Type LTPS TFTs

〇Tetsuya Goto^1,2, Tomoyuki Suwa^1,2, Keita Katayama³, Shu Nishida³, Hiroshi Ikenoue⁴, Shigetoshi Sugawa¹ (1.Tohoku Univ., 2.FAIS, 3.Kyushu Univ., 4.Kochi Univ. of Tech.)

Keywords:

LTPS,TFT,Charge trap layer

Threshold voltage (V_T) variation is a critical issue for LTPS TFT. To solve this difficulty, we fabricated MONOS structure with charge trap layer in the gate insulator in LTPS TFT to adjust V_T, as in nonvolatile memory technology. It was confirmed that V_T could be controlled both positively and negatively by injecting charges into charge trapping layer with positive/negative gate bias applications.