Presentation Information
[23a-A303-2][INVITED] Statistical Analysis of Random Telegraph Noise Dependence on MOS Transistor Shapes and Drain-to-Source Voltage
〇takezo mawaki1,2, rihito kuroda1,2 (1.Grad. Sch. Eng. Tohoku Univ., 2.NICHe Tohoku Univ.)
Keywords:
semiconductor,random telegraph noise,MOS transistor
In this work, random telegraph noise (RTN) of a large number of MOSFETs was measured for each of rectangular and trapezoidal shaped gates, different isolation structures, buried channel, and thin gate dielectrics under various drain-to-source voltage (VDS) conditions were analyzed.
It was found that RTN is dominated by traps at the minimum gate width in the channel formed under each of the operating VDS conditions. From the results for MOSFETs with PN junction isolation, the effect of the minimum gate width is highly influenced by the effect of traps associated to Shallow Trench Isolation (STI).
It was found that RTN is dominated by traps at the minimum gate width in the channel formed under each of the operating VDS conditions. From the results for MOSFETs with PN junction isolation, the effect of the minimum gate width is highly influenced by the effect of traps associated to Shallow Trench Isolation (STI).