Presentation Information
[7a-P05-69]Hysteresis Reduction in Layered Material Channel Field-Effect Transistors with Gallium Sulfide as Buffer Layer
〇(M1)Rei Shiina1, Hong En Lim1, Keiji Ueno1 (1.Saitama Univ.)
Keywords:
hysteresis,Gallium Sulfide,buffer layer
In FET using layered materials such as MoS2 as the channel layer, the mobility is often reduced due to carrier traps caused by the surface roughness and polar functional groups of SiO2 gate. The use of GaS, an insulating layered material, as a buffer layer has been shown to improve the mobility; however, there have been reports of increased hysteresis due to positive charge traps caused by sulfur defects. In this study, the relationship between the thickness of GaS and hysteresis was investigated, and sulfur annealing treatment was applied to reduce the hysteresis.