[15a-K406-1~11] KS.2 Quantum Information Engineering Group

9:15 AM - 9:30 AM JST(12:15 AM - 12:30 AM UTC)

[15a-K406-2] Single-qubit-gate leakage-error characterization in transmon qubits

〇Toru Abe^1,2, Ryo Murakami^1,2, Yoshiyasu Doi^1,2, Shintaro Sato^1,2, Yutaka Tabuchi², Yasunobu Nakamura^2,3 (1.Fujitsu Ltd., 2.RIKEN RQC, 3.Univ. of Tokyo)

Keywords:

quantum computer,quantum control,transmon qubit

To achieve practical quantum computation in early-FTQC, leakage error of around 10^-4 is not negligible. We evaluated single-qubit gate leakage error in a transmon qubit using Leakage Randomized Benchmarking (LRB). Clifford gates are decomposed into virtual Z and X/2 gates; the X/2 gate is implemented with a DRAG-corrected 10 ns FWHM Gaussian pulse. LRB showed a (1.5 ± 0.1) × 10^-4 leakage error per Clifford gate. This exceeds the above criteria. To investigate the source of this leakage error, we performed relaxation measurement which start from e state and analyzed using 3 levels rate equation. This indicates that qubit gates are the primary leakage error source for single-qubit gates, while contribution of thermal excitation is smaller. However, impact of thermal excitation may increase for two-qubit gates due to their longer durations (over 100 ns). Future work will focus on improving measurement efficiency, characterizing chip-wide leakage, and extending LRB to two-qubit gates.