[17a-K306-1~10] FS.1 Focused Session "AI Electronics"

10:15 AM - 10:45 AM JST(1:15 AM - 1:45 AM UTC)

[17a-K306-5] [INVITED] Device Model and Low Impedance Design of the Board-Embedded Multi-Aluminum Capacitor Array Element (iPaS) Enabling the Implementation of a New Power Supply System, VPD (Vertical Power Delivery), in the High Performance Computing (HPC) Market

〇Takeshi Furukawa¹, Akitomo Takahashi¹, Koshi Himeda¹, Atsushi Yamamoto¹ (1.Murata Manufacturing Co., Ltd)

Keywords:

iPaS,vertical power delivery,Power Distribution Network

With the advancement of AI, the power consumption of high-performance semiconductors is increasing, making the reduction of PDN (Power Distribution Network) losses critical in the HPC (High-Performance Computing) field. In this study, we developed "Capacitor-iPaS" suitable for vertical power delivery. By utilizing PTH (Plated Through Holes), we achieved efficient power supply and reduced losses while enhancing decoupling effects over a broad frequency range. Furthermore, we constructed a 3D model that replicates the characteristics of iPaS and confirmed its high consistency with measured values. This contributes to advanced PDN design and next-generation power systems.