[17p-K101-1~12] 13.5 Semiconductor devices/ Interconnect/ Integration technologies

4:15 PM - 4:30 PM JST(7:15 AM - 7:30 AM UTC)

[17p-K101-11] Energy-minimum point for PIM-type neural-network accelerator macros having parallelized MAC units

〇Yusaku Shiotsu¹, Satoshi Sugahara¹ (1.FIRST, Tokyo Inst. of Tech)

Keywords:

Neural network accelerator,Energy minimum point operation,Processing-in-memory