The 87th JSAP Autumn Meeting 2026
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Session Details

Symposium (Oral)Symposium : Strategic Fab Operations: A New Foundation for Next-Generation Device Realization

[8p-E310-1~7]Strategic Fab Operations: A New Foundation for Next-Generation Device Realization

Tue. Sep 8, 2026 1:30 PM - 5:45 PM JST
Tue. Sep 8, 2026 4:30 AM - 8:45 AM UTC
E310 (First Year Education Bld. E Block)
Chair : Shin Nakagawa(SCREEN), Toshiyuki Mitsue(Deloitte)
Advancing next-generation semiconductors requires research designed around not only materials and device innovation but also the volume-Fab operation technologies that support them. This symposium explores advanced chips that become manufacturable only when a volume Fab can precisely manage process sequence, tool-dispatch timing, inter-process queue time, and automated transport—discussing them through the lenses of advanced Fab operation, 3D integration, design-manufacturing co-optimization, and environmental-impact reduction, and reframing the manufacturing floor's time and process constraints as a new starting point for semiconductor research.
1:30 PM - 2:00 PM JST(4:30 AM - 5:00 AM UTC)

[8p-E310-1]Opening / Award Ceremony

〇Kenji Kumagai1 (1.Murata Machinery, LTD.)
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2:00 PM - 2:40 PM JST(5:00 AM - 5:40 AM UTC)

[8p-E310-2]Measures to Reduce PFC Gas Emissions in Semiconductor Manufacturing

〇Hiroyuki Fukumizu1 (1.Kioxia Corp.)
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2:40 PM - 3:20 PM JST(5:40 AM - 6:20 AM UTC)

[8p-E310-3]Measurement Technologies for Reducing Environmental Impact and Contributing to the Green Transformation of the Semiconductor Industry

〇Masaya Yoshioka1, Nobuyuki Kannan2 (1.HORIBA, 2.HORIBA STEC)
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3:35 PM - 4:15 PM JST(6:35 AM - 7:15 AM UTC)

[8p-E310-4]Future of Muiti-Fab Operations and Planning: Towards a Multi-objective, Harmonious System Encompassing Causality and Externalities (Tentative title)

〇Sumika Arima1 (1.Inst. Systems and Information Engineering, University of Tsukuba)
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4:15 PM - 4:55 PM JST(7:15 AM - 7:55 AM UTC)

[8p-E310-5]Data Security for Fab Operations in the AI Era

〇Yusuke Maruyama1,2 (1.EAGLYS Inc, 2.Waseda University, Research Organization for Nano & Life Innovation)
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4:55 PM - 5:35 PM JST(7:55 AM - 8:35 AM UTC)Highlighted Presentation

[8p-E310-6]Accelerating Next-Generation Semiconductor Manufacturing through Design-Manufacturing Co-Optimization: Advanced Process Manufacturing and Chip Design Bridged by AI Agents

〇Koki Tsurusaki1 (1.Rapidus Corporation)
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5:35 PM - 5:45 PM JST(8:35 AM - 8:45 AM UTC)

[8p-E310-7]Closing "New launchpad for semiconductor R&D"

〇Hiroyuki Akinaga1 (1.Hokkaido University)
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