[15a-M_124-1~13] 13.5 Semiconductor devices/ Interconnect/ Integration technologies

12:15 PM - 12:30 PM JST(3:15 AM - 3:30 AM UTC)

[15a-M_124-13] TCAD simulation of single-trap-charge-induced variability in gate-all-around nanosheet silicon channel

〇Takefumi Kamioka¹, Junichi Hattori¹, Naoya Okada¹, Koichi Fukuda¹ (1.SFRC, AIST)

Keywords:

gate-all-around,variability,trap charge