[16a-S2_203-1~9] 13.5 Semiconductor devices/ Interconnect/ Integration technologies

11:15 AM - 11:30 AM JST(2:15 AM - 2:30 AM UTC)

[16a-S2_203-8] Development of Planarized Resist Coating Technology for Deep Patterned Substrates

〇Haruki Kojima¹, Hirotsugu Kawashima¹, Sota Matsumoto¹, Yusuke Okumura¹, Akira Matsumura¹, Koji Arita¹ (1.KIOXIA Corporation)

Keywords:

3D Flash Memory,lithography,Positron Annihilation Spectroscopy

3D flash memory features a multilayered memory cell structure, resulting in deep stepped patterns and surface topography on the substrate. During resist patterning on such substrates, resist thickness varies due to absorption by the existing topography. The case of exposure and development are performed with non-uniform resist film thickness, it difficult to ensure sufficient process margins because of the focus will shift by pattern shape variation. Therefore, pretreatment such as embedding or sealing the patterns is necessary prior to resist coating. In this study, the resist planarization support technology is reported that enables reprocessing after resist patterning by embedding deep patterns with a carbon film, forming a capping structure that seals the pattern tops using SiO2-based materials, and subsequently removing the embedded carbon film while maintaining the integrity of the cap.