[17a-S2_203-1~12] 13.5 Semiconductor devices/ Interconnect/ Integration technologies

11:45 AM - 12:00 PM JST(2:45 AM - 3:00 AM UTC)

[17a-S2_203-11] Investigation of Selective Source/Drain epitaxial growth for CMOS-GAAFET Integration

〇Yoko Tanaka¹, Hiroki Tonegawa¹, Ryutaro Nishino¹, Kazuya Uejima¹, Naoto Kumagai¹, Tetsuya Ueda¹, Chia-Tsong Chen¹, Toshifumi Irisawa¹, Atsushi Yagishita¹, Yoshihiro Hayashi¹ (1.AIST SFRC)

Keywords:

CMOS,GAAFET,epitaxial growth

For the realization of CMOS-GAAFETs, selective epitaxial growth on p-type and n-type source/drain regions is indispensable. In this study, the growth behaviors of p⁺-SiGe:B and n⁺-SiP were comparatively investigated. SiP exhibited stable selective growth without being affected by the presence of a CMOS differentiation mask. In contrast, SiGe:B showed a pronounced dependence on the mask opening ratio, indicating a supply-limited growth regime. These results demonstrate that optimization of SiGe:B growth conditions requires careful consideration of the mask opening ratio, and process improvements are currently underway.