[18a-S2_203-1~10] 13.5 Semiconductor devices/ Interconnect/ Integration technologies

9:30 AM - 9:45 AM JST(12:30 AM - 12:45 AM UTC)Presentation by Applicant for JSAP Young Scientists Presentation Award

[18a-S2_203-2] Parasitic Capacitance Reduction by Floating Electrode in Low-Voltage Trench Field-Plate
Power MOSFETs

〇Satoshi Hoshida¹, Daichi Ishii¹, Shuhei Tokuyama¹, Toshifumi Nishiguchi¹, Kenji Maeyama¹, Tsuyoshi Kachi¹, Hiroaki Kato¹ (1.Toshiba Electronic Devices & Storage Corporation)

Keywords:

Trench Field-Plate Power MOSFETs,Parasitic Capacitance,Floating Electrode

In low-voltage Si power MOSFETs, a conventional structure places the gate electrode and the source field plate electrode opposite each other within the same trench, which increases parasitic capacitance and reduces switching speed. This study proposes a new structure that replaces part of the source field plate with a floating electrode. Prototype devices achieved a 29% reduction in gate input capacitance. These results demonstrate that reducing parasitic capacitance is an effective approach to improving device performance.