The 73rd JSAP Spring Meeting 2026
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Session Details

Oral presentation13 Semiconductors : 13.5 Semiconductor devices/ Interconnect/ Integration technologies

[18a-S2_203-1~10]13.5 Semiconductor devices/ Interconnect/ Integration technologies

Wed. Mar 18, 2026 9:00 AM - 12:00 PM JST
Wed. Mar 18, 2026 12:00 AM - 3:00 AM UTC
S2_203 (South Bldg. 2)
9:00 AM - 9:30 AM JST(12:00 AM - 12:30 AM UTC)

[18a-S2_203-1][The 3rd Kenji Natori Award Speech] The Past, Present, and Future of Power Semiconductors
- Semiconductor technologies are evolving through fusion -

〇Mitsuhiko Kitagawa1 (1.Retired from Toshiba Electronic Devices & Storage Corporation 2022)
9:30 AM - 9:45 AM JST(12:30 AM - 12:45 AM UTC)Presentation by Applicant for JSAP Young Scientists Presentation Award

[18a-S2_203-2]Parasitic Capacitance Reduction by Floating Electrode in Low-Voltage Trench Field-Plate
Power MOSFETs

〇Satoshi Hoshida1, Daichi Ishii1, Shuhei Tokuyama1, Toshifumi Nishiguchi1, Kenji Maeyama1, Tsuyoshi Kachi1, Hiroaki Kato1 (1.Toshiba Electronic Devices & Storage Corporation)
9:45 AM - 10:00 AM JST(12:45 AM - 1:00 AM UTC)

[18a-S2_203-3]Analysis of Polycrystalline Si Grain Size Distribution during Laser Annealing in 3D Flash Memory

〇Kota Horikawa1, Koichi Sakata1, Sadatoshi Murakami1, Shinya Arai1, Koji Arita1, Kyohei Nabesaka2, Atsushi Shimoda2, Makoto Koto2 (1.KIOXIA, 2.Sandisk)
10:00 AM - 10:15 AM JST(1:00 AM - 1:15 AM UTC)

[18a-S2_203-4]Embedded flash memory using multi-floating gate

〇HIROSHIGE HIRANO1, HIROAKI KURIYAMA1, ATSUSHI NOMA1 (1.Tower Partners Semiconductor Co.,Ltd.)
10:15 AM - 10:30 AM JST(1:15 AM - 1:30 AM UTC)

[18a-S2_203-5]Improvement of Memory Cell Characteristics in 3D Flash Memories with Gate Side Injection and Isolated Charge Trap Structure

〇Tatsuya Ishikawa1, Hiroshi Takeda1, Takashi Kurusu1 (1.KIOXIA)
10:45 AM - 11:00 AM JST(1:45 AM - 2:00 AM UTC)Presentation by Applicant for JSAP Young Scientists Presentation Award

[18a-S2_203-6]Highly Granular Method for Extraction of RTN in the Readout Current of 40nm TaOX-based ReRAM

〇(M2)Yushi Elliot Abarra1, Naoko Misawa1, Chihiro Matsui1, Ken Takeuchi1 (1.Univ. Tokyo)
11:00 AM - 11:15 AM JST(2:00 AM - 2:15 AM UTC)Presentation by Applicant for JSAP Young Scientists Presentation Award

[18a-S2_203-7]A Study on Probabilistic Non-volatile Memory Cells Utilizing Intrinsic Noise in Nanowires

〇(B)Kenshin Takamura1, Kota Ando2, Katsuhiro Tomioka2, Tetsuya Asai2 (1.School of Engineering, Hokkaido Univ., 2.Faculty of Information Science and Technology, Hokkaido Univ.)
11:15 AM - 11:30 AM JST(2:15 AM - 2:30 AM UTC)

[18a-S2_203-8]Design of parallel-READ single-ended SRAM macros for near energy-minimum-point operation

Tadakatsu Yaguchi1, 〇Yusaku Shiotsu1, Satoshi Sugahara1 (1.FIRST, Inst. of Sci. Tokyo)
11:30 AM - 11:45 AM JST(2:30 AM - 2:45 AM UTC)

[18a-S2_203-9]An energy-efficient parallel-processing in-memory BNN accelerator macro using XNOR-SRAM

Kein Kondo1, 〇Yusaku Shiotsu1, Satoshi Sugahara1 (1.FIRST, Inst. of Sci. Tokyo)
11:45 AM - 12:00 PM JST(2:45 AM - 3:00 AM UTC)

[18a-S2_203-10]Design of parallel-processing in-memory neural-network accelerator macro for INT4 inference

〇Yusaku Shiotsu1, Satoshi Sugahara1 (1.FIRST, Inst. of Sci. Tokyo)
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