Session Details
[N-1]Sensor Circuits and Systems
Mon. Sep 2, 2024 2:30 PM - 3:45 PM JST
Mon. Sep 2, 2024 5:30 AM - 6:45 AM UTC
Mon. Sep 2, 2024 5:30 AM - 6:45 AM UTC
Room N (Studio 1)(1st Floor)
Session Chair: Keita Yasutomi (Shizuoka Univ.), Wataru Saito (Renesas Electronics Corp.)
[N-1-01 (Invited)]Digital and Analog Calibration Techniques for a Global Shutter CMOS Terahertz Image Sensor
〇Masayuki Ikebe1, Yoshihiro Komatsu1, Takuto Togashi1 (1. Hokkaido Univ. (Japan))
[N-1-02]Performance improvement by multi-layer on-pixel polarizer structure using 0.35-µm CMOS process for high-sensitivity electro-optic imaging system
〇Ryoma Okada1, Maya Mizuno2, Hironari Takehara1, Makito Haruta1, Hiroyuki Tashiro1, Jun Ohta1, Kiyotaka Sasagawa1 (1. Nara Institute of Science Technolgy (Japan), 2. National Institute of Information and Communications Technology (Japan))
[N-1-03]Self-Resetting CMOS Image Sensor with Signal-to-Noise Ratio of over 70 dB throughout the Entire Imaging Area
〇Subaru Iwaki1, Kiyotaka Sasagawa1, Yoshinori Sunaga1, Hironari Takehara1,2, Makito Haruta1,3, Hiroyuki Tashiro1,4, Jun Ohta1 (1. Nara Inst. of Sci. and Tech. (Japan), 2. Nara Advanced Imaging Tech., Co., Ltd. (Japan), 3. Chitose Inst. of Sci. and Tech. (Japan), 4. Kyushu Univ. (Japan))
[N-1-04]An Area-Efficient Sub-nJ/Conversion Temperature-to-Digital Converter
Po-Wei Lai1, Chung-Tai Wei1, 〇Hongchin Lin1 (1. National Chung Hsing University (Taiwan))