Session Details
[SO-PS-12]12: Advanced Circuits / Systems Interacting with Innovative Devices and Materials
Tue. Sep 3, 2024 1:30 PM - 1:38 PM JST
Tue. Sep 3, 2024 4:30 AM - 4:38 AM UTC
Tue. Sep 3, 2024 4:30 AM - 4:38 AM UTC
Room N (Studio 1)(1st Floor)
Session Chair: Yasuhiro Ogasahara (AIST), Hongchin Lin (National Chung Hsing Univ.)
[SO-PS-12-01]A Scalable Equivalent Circuit Model with Lossy Substrate and Layout Dependent Effects for mm-Wave CMOS Simulation and Design
〇Adhi Cahyo Wijaya1, Jinq Min Lin1, Jyh Chyurn Guo1 (1. National Yang Ming Chiao Tung University (Taiwan))
[SO-PS-12-02]Design Method of an SoC Emulator with Nonvolatile FPGAs
〇Daisuke Suzuki1, Tahahiro Hanyu2 (1. The Univ. of Aizu (Japan), 2. Tohoku Univ. (Japan))
[SO-PS-12-03]Reference sampling for high-precision direct ToF sensing
〇Keita Yasutomi1, Kazuki Tada1, Hirofumi Saita2, Osamu Watase2, Keiichiro Kagawa1, Shoji Kawahito1 (1. Shizuoka University (Japan), 2. Suruga Seiki Corporation (Japan))
[SO-PS-12-04 (Late News)]A 59–93 GHz Low-Noise Amplifier with 15.7 ± 1.5 dB Gain for Wireless Communications in 90-nm CMOS
〇Tzu-Wei Cheng1, Chia-Sung Chiu2, Guo-Wei Huang2, Kun-Ming Chen2, Liang-Chung Shen2, Lin-Kun Wu1, Pei-Ling Chi1 (1. National Yang Ming Chiao Tung Univ. (Taiwan), 2. Taiwan Semiconductor Research Inst. (Taiwan))