[PS-02] 02: Advanced and Emerging Memories / New Applications

[PS-02-10] Duration of Disturbance Tolerance Governed Bias Selection in 1T-DRAM Array

〇Abhinav Kranti¹, Rohit Kumar Nirala¹, Manish Gupta² (1. Indian Institute of Technology Indore (India), 2. Birla Institute of Technology and Science Pilani, K.K. Birla Goa Campus (India))

DOI:

https://doi.org/10.7567/SSDM.2025.PS-02-10

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