Presentation Information
[PS-09-04]A Proposal to Utilize VPG-VBG Mapping toward Optimizing Gate Voltages in Silicon Fin-Type Quantum Dot Devices
〇Yusuke Chiashi1, Kimihiko Kato1, Yoshihisa Iba1, Hiroshi Oka1, Shota Iizuka1, Hidehiro Asai1, Minoru Ogura1, Takumi Inaba1, Takahiro Mori1 (1. AIST (Japan))