[A-4] New device architecture

11:15 AM - 11:30 AM JST(2:15 AM - 2:30 AM UTC)

[A-4-03] PPA Examination of Flip Vertical FET (FVFET), a Novel Stacked VFET Architecture

〇Jiahao Zhang¹, Ziqiao Xu¹, Siyuan Liu¹, Yanbang Chu¹, Xinyue He¹, Yu Liu¹, Runsheng Wang¹, Ming Li¹, Heng Wu¹ (1. School of Integrated Circuits, Peking Univ. (China))