[SO-PS-03] Heterogeneous and 3D Integration / Interconnect / MEMS

1:44 PM - 1:46 PM JST(4:44 AM - 4:46 AM UTC)

[SO-PS-03-08 (Late News)] Signal and Power Integrity Co-Analysis of a High-Speed System-in-Package with Through-Silicon Interposer for Logic-Memory Integration

〇Yeong-Lin Lai¹, Wen-Jung Chiang¹ (1. National Changhua University of Education (Taiwan))