Session Details

[B-5]Ferroelectric FET 2

Thu. Sep 17, 2026 8:30 AM - 9:45 AM JST
Thu. Sep 17, 2026 11:30 PM - 12:45 AM UTC
Room B(Convention Hall 2, 2rd Floor)
Session Chair:Kouichi Nagai(RAMXEED), E Ray Hsieh(National Yang Ming Chiao Tung Univ.)

[B-5-01 (Invited)]Device-to-Package Co-Design of Vertically Integrated FeRAM for Efficient AI Memory

〇Vijaykrishnan Narayanan Narayanan1, Kai Ni2 (1. The Pennsylvania State Univ., USA (USA), 2. Notre Dame Univ., USA (USA))

[B-5-02]Investigation of N2O Gas-Treated Interfacial Layer and ZrO2 Seed Layer on Ferroelectricity and Memory Window of UTB HZO FeFETs

Dong-Ru Hsieh1, Hsin-Yu Chen1, Li-Quan Yang1, Nai-Fang Hsu1, Yu Fu1, 〇Tien-Sheng Chao1 (1. National Yang Ming Chiao Tung University (NYCU) (Taiwan))

[B-5-03]Tunneling Dielectric Layer Position Optimization and Performance Trade-offs in FeFETs for Fe-NAND Application

〇Zeqi Chen1,2,3, Xianzhou Shao1,2, Ruoyao Ji1,2, Mingkai Bai1,2,3, Xinpei Jia1,2, Tao Hu1,2,3, Junshuai Chai1,2, Hao Xu1,2, Xiaolei Wang1,2, Wenwu Wang1,2, Tianchun Ye1,2 (1. State Key Lab. of Fabrication Technologies for Integrated Circuits, Chinese Academy of Sciences (CAS), Beijing, China (China), 2. Inst. of Microelectronics of Chinese Academy of Sci. (IMECAS), Beijing, China (China), 3. School of Integrated Circuits, Univ. of Chinese Academy of Sci. , Beijing, China (China))

[B-5-04]Achieving Low-Voltage Operation and Superior Endurance via Hybrid HAO/HZO Ferroelectric Layers and Microwave Annealing

〇Ming-Chen Chou1, Yu-Cheng Lin1, Yung-Hsien Wu1 (1. National Tsing Hua Univ. (Taiwan))