2026 International Conference on Solid State Devices and Materials
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Session Details

Poster Session12: Advanced and Innovative Circuits / Systems Interacting with Devices and Materials

[PS-12]12: Advanced and Innovative Circuits / Systems Interacting with Devices and Materials

Wed. Sep 16, 2026 3:00 PM - 5:00 PM JST
Wed. Sep 16, 2026 6:00 AM - 8:00 AM UTC
Poster Hall（Convention Hall 3+4）(Convention Hall 3+4, 13rd Floor)

[PS-12-01]0.42pW/bit Low-Power-Density High-Accuracy Ternary-Gated Spiking MGU Accelerator for Low-Time-Step Spiking Automatic Speech Recognition

〇Jiapeng Shi1, Shuming Liu2, Zhongyong Ye3, Yitao Ma2,3,4 (1. University of Science and Technology of China (China), 2. Zhejiang University (China), 3. Zhejiang ICsprout Semiconductor Co. Ltd (China), 4. ZJU-Hangzhou Global Scientific and Technological Innovation Center (China))

[PS-12-02]A 1.2-mV Low-Ripple Seamless-Transition Single-Mode Hybrid Buck-BoostConverter for Lithium-Ion Battery-Powered Sensor Interfaces

〇JingYao Chi1, Xinjian Wang1, Wenrui Chen3, Yaolei Guo1, Chenhao Tang1, Yue Cheng1, Wenjing Mu3, Ping Ouyang3, Yitao Ma1,2,3 (1. Zhejiang Univ. (China), 2. ZJU-Hangzhou Global Sci. and Tech. Innovation Center (China), 3. Zhejiang ICsprout Semiconductor Corp. (China))

[PS-12-03]Programmable Temperature Switch with Wide-Range Threshold Control

〇Yugo Matsumoto1, Tetsuya Hirose1 (1. The University of Osaka (Japan))

[PS-12-04]An Ultra-Low-Power ELM-RLS Chip for On-Chip Online Learning in Extreme-Edge AI Systems

〇Yinfei Ma1, Keisuke Takano2, Shiyuan Sun1, Satoshi Kawakami1, Takeaki Yajima1 (1. Kyushu University (Japan), 2. Japan Advanced Institute of Science and Technology (Japan))

[PS-12-05]A Fast-Locking, Low-Power, and Low-Jitter Sub-Sampling PLL with a Dead Zone Automatic Controller in 16nm FinFET

〇Jyun-Si Lin1, Yu-Lung Lo1, Wei-Bin Yang2 (1. The Univ. of National Kaohsiung Normal (Taiwan), 2. The Univ. of Tamkang (Taiwan))

[PS-12-06]Transimpedance Amplifier for Low IRN and Flat Group Delay Using Bessel Filter-Based Pole Placement and Negative Capacitance

〇Yuki Kubo1, Masahiro Fujii1, Ippei Akita1 (1. AIST (Japan))
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