[14p-K402-1~9] 15.6 Group IV Compound Semiconductors (SiC)

1:45 PM - 2:00 PM JST(4:45 AM - 5:00 AM UTC)Presentation by Applicant for JSAP Young Scientists Presentation Award

[14p-K402-3] Application of Bayesian Inference in Capacitance Transient Analysis for Characterization of Deep Levels

〇(B)Kotaro Yamanaka¹, Tsunenobu Kimoto¹, Mitsuaki Kaneko¹ (1.Kyoto Univ.)

Keywords:

defect characterization,capacitance transient analysis,Bayesian inference

Capacitance transient analysis such as Deep Level Transient Spectroscopy (DLTS) has been widely used to evaluate deep levels in semiconductors. However, it is challenging to separate the characteristics of levels with similar time constants in capacitance transient changes, and a very high signal-to-noise ratio is typically required for this purpose. In this study, we applied Bayesian inference to capacitance transient analysis in order to improve performance under low signal-to-noise conditions. As a result, the minimum signal-to-noise ratio required to achieve the same time constant resolution was significantly reduced compared to Laplace DLTS, which is known as a superior method for separating the characteristics of levels with similar time constants.