[16a-K508-1~11] 13.5 Semiconductor devices/ Interconnect/ Integration technologies

10:00 AM - 10:15 AM JST(1:00 AM - 1:15 AM UTC)

[16a-K508-5] Simulation of Via Filling Copper Plating using the Pulse-Reverse Plating Method

〇LIZHU TONG¹, Tatsuhiko Nagayama¹ (1.Keisoku Eng. Sys.)

Keywords:

Pulse-reverse plating,Via-filling,Simulation

In DC plating, the electrical conditions during plating are determined by specifying either the current density or potential. On the other hand, pulse plating, which changes the current or potential over time, is an effective method of controlling the surface morphology of the deposits. In this work, we performed a simulation study of via-filling copper plating that supports the structure of Through-Silicon Vias (TSVs). A plating technology to achieve optimal uniform film thickness using pulse current was verified.