[17a-K101-1~13] 13.5 Semiconductor devices/ Interconnect/ Integration technologies

12:15 PM - 12:30 PM JST(3:15 AM - 3:30 AM UTC)

[17a-K101-13] Analytical modeling of RTN-induced current distribution with short dwell time

〇Kazuya Uejima¹, Kenzo Manabe¹, Yoshihiro Hayashi¹ (1.SFRC, AIST)

Keywords:

RTN

Random Telegraph Noise (RTN) of operation current of semiconductor devices could cause some errors of logic circuit and memory operations. Then it is important to quantify RTN parameters such as average dwell times to understand the influence of RTN on circuit operation and identify the origine of defect causing RTN. However, it gets difficult as average dwell times become shorter. In this work, these issues and such RTN-induced error were focused on and solved by newly developed analytical model of RTN.