ssdm2024OP_micron.png

Micron

General information

Greetings

Announcements(0)

Program

Sessions

Search presentations

Download PDF for print

Timetable

Sun. Sep 1, 2024

Mon. Sep 2, 2024

Tue. Sep 3, 2024

Wed. Sep 4, 2024

PmlE68RDnTBu0QmluaBh.ico

web_header.png

icon.png

Profile management

Bookmark

Announcements

Program Type

Area

Plenary / Invited

Change account information such as the email address and password on the account setting screen common to Confit.

Log in to make the most of the service, such as bookmark registration.

Login required to view

Password required to view

Presentation Information

Session Details

To browse or post comments, you must log in.

You cannot post comments as it is outside the comment posting period.

This comment has been deleted. You cannot reply to this comment.

Low-temperature annealing effect on electrical/structural characteristics for SiO<sub>2</sub>/GeO<sub>2</sub>/Ge gate stack

U2FsdGVkX1/sic2euPqB41LhPEezDv3o8d/yZTlzasJ+N6hp4TAM4Q9Glc4xENzy+jXFzi7ivdDTsLeaYpRLqRVzujIVCmOv5+UWN1MGM9O1ZliOFzLZh6iGgucxzqpzrtMXYpNfwnoErU71fvvcYknuUVzADHsG9Tawln0ME6VhMbdC2cjWFeqGv50Hp7flXQ5kcEc/qCbCmSxbBibRAtLHBI0ELO0B6MdyKd5uaFj3ol8XcBuiuUbFDS7RijNwRfGZ6RoUkZoatpduIOMtFyOCujoWmTlS2bLfOUMRztu/ApK+XDxcUBIKCHJ2uVlhsFMTx1wT4dGevNIW40eFHxVrRE6EHaKNwP7PsCQocx91SvfUxn5BTwQAGFzQpw1OPX0DDEvw8P5HZZpbWC56/cQ4J5WJhnO7MF+xvg3xqvu6/2dAbBm8KstBgbW+MF43xKLwcjKhTO/cJNzfyR9qE+CrFrTG+ikMuoz6rPbt1gN24BQ2zDG9R3pmJ9JqkEWEHb181ajqELaZN6o8Gapg3+JiiAj2WldS8jsOWFbm4miv/kJwCk89EQQOtPdKFahsTmmkp2jWxIyZeYnZfBQWFn9T4mYfugFYOPrLDfcgktxjrirX0d2faDuC1iptwNkX82LNnX86nu1LGf6/c0s+LHKaNhT8WxBETjRa/DtDWYXUQcOo5GTcsnU/mPTMzDaY4H4F916Fyc2OFNgo2pQvcjp2l17FTCv93vbaY7sdhXaLH6a44WNfMfEF07+ElIN1a7DTR+ohb1HWkjpqe21Mv5n4fpK3nEUROtbPZhksX5O1xACa71KCGH43dTCJoKtyQoiBbsDLqv6hCwImF7uMVXjMTqHL0WXmgCBRRHBV8XTYtZgcJ3lUDVIbj9CQHKLp

Advanced CMOS: Device Technology

2024 International Conference on Solid State Devices and Materials

Presentation Information

[A-4-04 (Late News)]Low-temperature annealing effect on electrical/structural characteristics for SiO₂/GeO₂/Ge gate stack

Password required to view

Presentation Information

[A-4-04 (Late News)]Low-temperature annealing effect on electrical/structural characteristics for SiO2/GeO2/Ge gate stack

Password required to view

[A-4-04 (Late News)]Low-temperature annealing effect on electrical/structural characteristics for SiO₂/GeO₂/Ge gate stack