[A-5-01 (Invited)]Gate Stack Engineering of Ferroelectric HfZrO2 from Multi-Level Non-Volatile Memory (NVM) to Analog-based Synapse
〇Min-Hung Lee1, Zhao-Feng Luo1, Kuo-Yu Hsing2, Fu-Shen Chang1, Jia-Yang Lee1, Yii-Tay Chang1, Cheng-Hong Liu1(1. National Taiwan Univ. (Taiwan), 2. National Yang Ming Chiao Tung Univ. (Taiwan))
In order to further enhance the storage density for emerging memory, the 3D architecture and multi-level functionality are the pathways. The nonidentical thickness of double-HZO (DHZO) with an inserted Al2O3 dielectric (DE) is employed to modulate the MW to improve the fault tolerance of readouts. DHZO exhibits a homogenous corner field for the 3D GAA NS FeFET. With superlattice (SL) mode for ferroelectric-phase enhancement to integrate as DHZO will be introduced for the analog operation of multibit and synapses, as well as for comparison with SS-DHZO. This is crucial to achieving analog-based energy-efficient accelerators for synapses in computing in-memory generation.
