[A-5] Ferroelectric Devices

9:00 AM - 9:30 AM JST(12:00 AM - 12:30 AM UTC)Invited

[A-5-01 (Invited)] Gate Stack Engineering of Ferroelectric HfZrO₂ from Multi-Level Non-Volatile Memory (NVM) to Analog-based Synapse

〇Min-Hung Lee¹, Zhao-Feng Luo¹, Kuo-Yu Hsing², Fu-Shen Chang¹, Jia-Yang Lee¹, Yii-Tay Chang¹, Cheng-Hong Liu¹ (1. National Taiwan Univ. (Taiwan), 2. National Yang Ming Chiao Tung Univ. (Taiwan))

DOI:

https://doi.org/10.7567/SSDM.2024.A-5-01

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