Session Details
[A-5]Ferroelectric Devices
Wed. Sep 4, 2024 9:00 AM - 10:00 AM JST
Wed. Sep 4, 2024 12:00 AM - 1:00 AM UTC
Wed. Sep 4, 2024 12:00 AM - 1:00 AM UTC
Room A (407)(4th Floor)
Session Chair: Kasidit Toprasertpong (The Univ. of Tokyo), Shibun Tsuda (Renesas Electronics Corp.)
[A-5-01 (Invited)]Gate Stack Engineering of Ferroelectric HfZrO2 from Multi-Level Non-Volatile Memory (NVM) to Analog-based Synapse
〇Min-Hung Lee1, Zhao-Feng Luo1, Kuo-Yu Hsing2, Fu-Shen Chang1, Jia-Yang Lee1, Yii-Tay Chang1, Cheng-Hong Liu1 (1. National Taiwan Univ. (Taiwan), 2. National Yang Ming Chiao Tung Univ. (Taiwan))
[A-5-02]Impact of Amorphous TiN Metal-Cap with High Residual Stress on Ferroelectricity of Hf0.5Zr0.5O2 for FeFET Memory with Low Voltage Operation
〇TADASHI YAMAGUCHI1, Shibun Tsuda1, Takahiro Kono1, Yoshiki Yamamoto1, Atsushi Amo1, Kazuyuki Omori1, Seiji Muranaka1, Masao Inoue1 (1. Renesas Electronics Corp. (Japan))
[A-5-03]Correlative Behavior between Defect Generation and Ferroelectricity in Hf0.5Zr0.5O2
〇Yukinori Morita1, Hiroyuki Ota1, Shutaro Asanuma1, Shinji Migita1 (1. AIST (Japan))