2024 International Conference on Solid State Devices and Materials
Sep 1 - Sep 4, 2024Arcrea HIMEJI
2024 International Conference on Solid State Devices and Materials
Sep 1 - Sep 4, 2024Arcrea HIMEJI
[A-7-01 (Invited)]Realization of CMOS Operation in 3-Dimensional Stacked FET with Self-Aligned Direct Backside Contact
〇Juhun Park1, Jaehyun Park1, Jejune Park1, Kyuman Hwang1, Jinchan Yun1, Dahye Kim1, Sungil Park1, Jinwook Yang1, Jae Won Jeong1, Chuljin Yun1, Jinho Bae1, Daihong Huh1, Deukho Yeon1, Sanghyeon Kim1, Seungeun Baek1, Soomin Son1, Junghan Lee1, Tae-sun Kim1, Seungjun Lee1, Sun-Jung Lee1, Sang Wuk Park1, Bong Jin Kuh1, Daewon Ha1, Sangjin Hyun1, Su Jin Ahn1, Jaihyuk Song1(1. Samsung Electronics Co., Ltd. (Korea))
Advancing beyond MBCFETTM technology, 3-dimensional stacked FET (3DSFET) arises as an up-and-coming contender, of which structure stacks n- and pFETs vertically, to facilitate ongoing scaling of logic technology. In this study, we report CMOS operation of 3DSFET by employing augmented nanosheet stack, co-targeted subthreshold voltage (Vt) for both n- and pFETs, and Self-Aligned Direct Backside Contact (SA-DBC) for bottom pFET.