Session Details
[A-7]Advanced CMOS: CFET
Wed. Sep 4, 2024 1:30 PM - 2:45 PM JST
Wed. Sep 4, 2024 4:30 AM - 5:45 AM UTC
Wed. Sep 4, 2024 4:30 AM - 5:45 AM UTC
Room A (407)(4th Floor)
Session Chair: Kuniyuki Kakushima (Tokyo Tech), Anabela Veloso (imec)
[A-7-01 (Invited)]Realization of CMOS Operation in 3-Dimensional Stacked FET with Self-Aligned Direct Backside Contact
〇Juhun Park1, Jaehyun Park1, Jejune Park1, Kyuman Hwang1, Jinchan Yun1, Dahye Kim1, Sungil Park1, Jinwook Yang1, Jae Won Jeong1, Chuljin Yun1, Jinho Bae1, Daihong Huh1, Deukho Yeon1, Sanghyeon Kim1, Seungeun Baek1, Soomin Son1, Junghan Lee1, Tae-sun Kim1, Seungjun Lee1, Sun-Jung Lee1, Sang Wuk Park1, Bong Jin Kuh1, Daewon Ha1, Sangjin Hyun1, Su Jin Ahn1, Jaihyuk Song1 (1. Samsung Electronics Co., Ltd. (Korea))
[A-7-02]Comparative Analysis of Middle Dielectric Isolation (MDI) Integration Approaches in Monolithic Complementary Field Effect Transistors: ‘MDI-First vs MDI-Last’
〇Camila Toledo de Carvalho Cavalcante1, Steven Demuynck1, Alfonso Sepulveda Marquez1, Maria Chistiakova1, Subhobroto Choudhury1, Geert Mannaert1, Farid Sebaai1, Maryam Hosseini1, Anne Vandooren1, Pallavi Puttarame Gowda1, Emmanuel Dupuy1, BT Chan1, Hans Mertens1, Jef Geypen1, Sujith Subramanian1, Lucas Petersen Barbosa Lima1, Serge Biesemans1, Naoto Horiguchi1 (1. imec, Leuven, Belgium (Belgium))
[A-7-03]Monolithic 3D Hetero-Integrated Circuits with 2D Electronics
〇Jhe-Ting Hong1, Ta Fan1, Cheng-Yang Syu1, Li-Syuan Hao1, Yu-Chen Liu1, Nei-Chih Lin2, Chih-Chao Yang2, Chao-Hui Yeh1,3 (1. The Inst. of Electronics Engineering, National Tsing Hua Univ. (Taiwan), 2. Taiwan Semiconductor Res. Inst. (Taiwan), 3. Department of Electrical Engineering, National Tsing Hua Univ. (Taiwan))
[A-7-04]Monolithic Stacked Ge Nanowires of Single-Gate CFET
Yi-Wen Lin1, Bo-An Chen1, Kai-Wei Huang1, 〇Yung-Chun Wu1, Fu-Ju Hou2 (1. National Tsing Hua Univ. (Taiwan), 2. Taiwan Semiconductor Research Inst. (Taiwan))