2024 International Conference on Solid State Devices and Materials
Sep 1 - Sep 4, 2024Arcrea HIMEJI
2024 International Conference on Solid State Devices and Materials
Sep 1 - Sep 4, 2024Arcrea HIMEJI
[B-3-03]Enhanced Ferroelectric Field Effect Transistor via Interlayer Engineering Featuring Memory Window of 3.6V, Endurance > 109 cycles, and Multi-Level Storage for NAND Memory
〇Jun Lan1, Haoran Peng1, Wenhui Wang1, Zhixiong Li1, Guobiao Zhang1, Mei Shen1, Xuewei Feng2, Jiamin Li1, Feichi Zhou1, Longyang Lin1, Yida Li1(1. Southern University of Science and Technology (China), 2. Shanghai Jiao Tong University (China))
In this work, a NAND memory architecture utilizing
enhanced Ferroelectric Field Effect Transistor (FEFET)
based on IGZO thin-film is presented. The enhanced
ferroelectric characteristics is achieved via interlayer (IL)
engineering using TiN/W. The optimized FEFET exhibits
large MW of 3.6 V, multiple states operation (3-bits) and
endurance exceeding 109 cycles. Consequently, a string of
NAND memory formed by 8 FEFETs was fabricated,
where an operating scheme suitable for FEFET-based
NAND array is proposed and experimentally
demonstrated. Our results will pave a potential pathway
for the use of FEFET in NAND architecture for future
high-density storage and computing applications.
enhanced Ferroelectric Field Effect Transistor (FEFET)
based on IGZO thin-film is presented. The enhanced
ferroelectric characteristics is achieved via interlayer (IL)
engineering using TiN/W. The optimized FEFET exhibits
large MW of 3.6 V, multiple states operation (3-bits) and
endurance exceeding 109 cycles. Consequently, a string of
NAND memory formed by 8 FEFETs was fabricated,
where an operating scheme suitable for FEFET-based
NAND array is proposed and experimentally
demonstrated. Our results will pave a potential pathway
for the use of FEFET in NAND architecture for future
high-density storage and computing applications.