[N-6] Compute-in-Memory

11:30 AM - 11:45 AM JST(2:30 AM - 2:45 AM UTC)

[N-6-03] An Ultra-low Power SNN Co-processor with Reconfigurable Computing-in-Memory Cell Array based on Differential-pair SRAM and Memristive Memory

〇yaolei Guo¹, Liangyao Deng¹, Jinxu Liu¹, Chenhao Tang¹, Yue Cheng¹, Yishu Zhang^1,2,3, Yongpeng Cheng^1,2,3, Yitao Ma^1,2,3 (1. College of intergrated circuits, Zhejiang University (China), 2. ZJU-Hangzhou Global Scientific and Technological Innovation Center (China), 3. Zhejiang ICsprout Semiconductor Co., Ltd (China))

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